Market demand for smaller and more functional electronic devices has driven the development of semiconductor devices, including semiconductor power packages and entire systems disposed on a chip. Some electronic devices, such as cellular telephones, employ a variety of design-specific electronic components. Other electronic devices, such as power packages utilized in the automotive industry, employ one or more logic chips connected to a leadframe and one or more power transistors connected to the leadframe and the logic chip(s). The space available inside the electronic devices is limited, particularly as the electronic devices are made smaller.
Wire bonds are employed in some known semiconductor packages to electrically connect the chip(s) to the carrier. The wire bonds are time consuming to connect, but when attached, provide a first level interconnect to the chip. When the chips in power packages are wirebonded, the wires are typically provided with diameters of between 100-500 micrometers to enable sufficient current flow to/from the chips. However, wires having a diameter of between 100-500 micrometers are relatively large and limit miniaturization of the packages. In addition, these conventional interposer-based semiconductor packages have a relatively low input/output density.
Photolithographic-fabricated conducting lines are employed with other known semiconductor packages to electrically connect chips to chips, and/or chips to the carrier. The conducting lines are formed with photolithographic masking, deposition of metal relative to the masking, and removal of the masking to reveal metal lines. Photolithographic formation of conducting lines can be expensive due to the exacting application of masks and the exacting tolerances of the deposition of the electrical conducting material.
Both the manufacturers and consumers of electronic devices desire devices that are reduced in size and yet have increased device functionality.
For these and other reasons there is a need for the present invention.